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verilog: 2018.12.15 -> 2019.03.27, parallel build

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Signed-off-by: Austin Seipp <aseipp@pobox.com>
This commit is contained in:
Austin Seipp 2019-04-22 12:26:34 -05:00
parent fe8eb566b5
commit b0fea1dc9c
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GPG Key ID: 25D2038DEB08021D
1 changed files with 7 additions and 5 deletions
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12
pkgs/applications/science/electronics/verilog/default.nix
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@ -2,15 +2,17 @@
stdenv.mkDerivation rec { stdenv.mkDerivation rec {
name = "iverilog-${version}"; name = "iverilog-${version}";
version = "2018.12.15"; version = "2019.03.27";
src = fetchFromGitHub { src = fetchFromGitHub {
owner = "steveicarus"; owner = "steveicarus";
repo = "iverilog"; repo = "iverilog";
rev = "7cd078e7ab184069b3b458fe6df7e83962254816"; rev = "a9388a895eb85a9d7f2924b89f839f94e1b6d7c4";
sha256 = "1zc7lsa77dbsxjfz7vdgclmg97r0kw08xss7yfs4vyv5v5gnn98d"; sha256 = "01d48sy3pzg9x1xpczqrsii2ckrvgnrfj720wiz22jdn90nirhhr";
}; };
enableParallelBuilding = true;
patchPhase = '' patchPhase = ''
chmod +x $PWD/autoconf.sh chmod +x $PWD/autoconf.sh
$PWD/autoconf.sh $PWD/autoconf.sh