From b0fea1dc9c07b4190212e0d344c4db5981b9f75e Mon Sep 17 00:00:00 2001 From: Austin Seipp Date: Mon, 22 Apr 2019 12:26:34 -0500 Subject: [PATCH] verilog: 2018.12.15 -> 2019.03.27, parallel build Signed-off-by: Austin Seipp --- .../science/electronics/verilog/default.nix | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/pkgs/applications/science/electronics/verilog/default.nix b/pkgs/applications/science/electronics/verilog/default.nix index c4268b54c20..83352df18e6 100644 --- a/pkgs/applications/science/electronics/verilog/default.nix +++ b/pkgs/applications/science/electronics/verilog/default.nix @@ -2,15 +2,17 @@ stdenv.mkDerivation rec { name = "iverilog-${version}"; - version = "2018.12.15"; + version = "2019.03.27"; src = fetchFromGitHub { - owner = "steveicarus"; - repo = "iverilog"; - rev = "7cd078e7ab184069b3b458fe6df7e83962254816"; - sha256 = "1zc7lsa77dbsxjfz7vdgclmg97r0kw08xss7yfs4vyv5v5gnn98d"; + owner = "steveicarus"; + repo = "iverilog"; + rev = "a9388a895eb85a9d7f2924b89f839f94e1b6d7c4"; + sha256 = "01d48sy3pzg9x1xpczqrsii2ckrvgnrfj720wiz22jdn90nirhhr"; }; + enableParallelBuilding = true; + patchPhase = '' chmod +x $PWD/autoconf.sh $PWD/autoconf.sh