158 lines
5.7 KiB
Plaintext
158 lines
5.7 KiB
Plaintext
(r) this line goes to the ROM only.
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(s) this line is Shared between the ROM, MMC/chip, and Nintendo
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(n) this line connects to the NES cart edge only, and not the ROM
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(w) this line connects to the WRAM only and nowhere else
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LS161 bankswitching [Excerpt from NESTUFF.TXT by Kevin Horton (khorton@iquest.net)]
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-------------------
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Quite a few carts seem to use either a single 74LS161, or a combination
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of an LS161 and LS32, or an LS161 and LS02.
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There are two main styles of LS161-only carts:
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NES-CN-ROM-256-[02,05]
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----------------------
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You can select either H or V mirroring; PRG ROM is *not* bankswitched
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and is either 16K or 32K. CHR ROM, however is bankswitched. It's set
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up as up to 4 8K pages. CHR ROM is either 16K or 32K.
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.---\/---.
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+5V - |01 16| - +5V
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PRG /CE - |02 15| - NC
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PRG D0 - |03 14| - CHR A14 (r)
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PRG D1 - |04 13| - CHR A13 (r)
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PRG D4 - |05 12| - CHR A12 control
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PRG D5 - |06 11| - CHR A11 control
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GND - |07 10| - GND
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GND - |08 09| - R/W
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`--------'
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'161
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NES-AOROM-03
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------------
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Very similar to above; however cart does not bankswitch CHR area; instead
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just has an 8K RAM chip. P-ROM is 256K in both carts I have.
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.---\/---.
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+5V - |01 16| - +5V
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PRG /CE - |02 15| - NC
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PRG D0 - |03 14| - PRG A15
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PRG D1 - |04 13| - PRG A16
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PRG D2 - |05 12| - PRG A17
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PRG D4 - |06 11| - CIRAM A10
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GND - |07 10| - GND
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GND - |08 09| - R/W
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`--------'
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'161
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NES-BN-ROM-01
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-------------
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Identical to above, except has a 28-pin 128K ROM instead.
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NES-UN-ROM-05 & Konami #531320
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------------------------------
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This uses both an LS161 and an LS32. The ROM is set up like on a non-
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bankswitched cart except this time only A0-A13 go to the ROM's A0-A13.
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A14 is used to control the LS32 and hence which bank the processor 'sees'.
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When A14 is high, it forces all the bankswitch address lines high; so the
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processor sees the last bank no matter what. When A14 is low, the OR gates
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will pass whatever is on the other input (which happens to be connected
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to the outputs of the '161). There is an 8K RAM for the CHR area.
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The Konami board is functionally the same; however the routing is slightly
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different (Uses a different gate from the '32 so you must take that in
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account when tracing the board with the followin pin-outs...)
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.---\/---.
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+5V - |01 16| - +5V
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PRG /CE - |02 15| - NC
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PRG D0 - |03 14| - Pin 13 of '32
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PRG D1 - |04 13| - Pin 2 of '32
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PRG D2 - |05 12| - Pin 9 of '32
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GND - |06 11| - NC
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GND - |07 10| - GND
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GND - |08 09| - R/W
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`--------'
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'161
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.---\/---.
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A14 - |01 14| - +5V
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Pin 13 of '161 - |02 13| - Pin 14 of '161
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ROM A15 - |03 12| - A14
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GND - |04 11| - ROM A14
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GND - |05 10| - A14
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NC - |06 09| - Pin 12 of '161
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GND - |07 08| - ROM A16
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`--------'
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'32
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NES-ANROM-03
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------------
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This cart has an 8K RAM chip for the CHR area. It contains an LS161
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for the selecting the current bank, and an LS02 to disable to PRG ROM
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during any write to the bankswitch circuit. Marat was saying he didn't
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know why the programs would write to an address associated with a bank;
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i.e. To switch to bank #05:
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LDA #$05
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STA $FFF5
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The reason is to avoid a bus conflict with the ROM; The ROM has the
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value 0$5 stored in address $FFF5. This is required, because the ROM is
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*not* disabled during a data write to the ROM's area!!! However, the
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LS02 added to this cart allieviates those problems. It disables the
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ROM during any data write to the cart area.
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.---\/---.
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+5V - |01 16| - +5V
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PRG /CE - |02 15| - NC
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PRG D0 - |03 14| - PRG A15
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PRG D1 - |04 13| - PRG A16
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+5V - |05 12| - NC
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PRG D4 - |06 11| - CIRAM A10
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GND - |07 10| - GND
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GND - |08 09| - R/W
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`--------'
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'161
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.---\/---.
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To pin 12 - |01 14| - +5V
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R/W - |02 13| - To pins 8 & 9
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R/W - |03 12| - To pin 1
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NC - |04 11| - PRG /CE
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GND - |05 10| - To /CE of ROM
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GND - |06 09| - To pin 13
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GND - |07 08| - To pin 13
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`--------'
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'02
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