324 lines
14 KiB
Plaintext
324 lines
14 KiB
Plaintext
AST RESEARCH TECHNICAL BULLETIN TB-0080 4-2-85
|
||
|
||
|
||
QUICK REFERENCE: ADVANTAGE!
|
||
|
||
|
||
To facilitate answering questions or configuring the AST
|
||
Advantage!, the following information has been assembled:
|
||
|
||
|
||
TABLE OF CONTENTS
|
||
Page
|
||
|
||
Installing the Advantage! in a 256K AT ........ 2
|
||
|
||
Running the AT Setup Program .................. 3
|
||
|
||
Advantage! Switch Block #1 .................... 4
|
||
|
||
Advantage! Switch Block #3 .................... 5
|
||
|
||
Parallel Port ................................. 8
|
||
|
||
Serial Port ................................... 8
|
||
|
||
|
||
|
||
TB-0080 PAGE 2
|
||
INSTALLING THE ADVANTAGE! IN A 256K AT
|
||
|
||
|
||
If you are installing your Advantage! in an AT equipped with a
|
||
256K system board, please note the following:
|
||
|
||
* An Advantage! being used in a 256K AT MUST be configured for
|
||
the Split Memory Addressing mode of operation. Figure 3-4 in
|
||
the Advantage! User's Manual shows the correct switch
|
||
settings for Switch Block #3 on the Advantage! in a 256K AT.
|
||
(In a 512K AT, you may use either Split or Contiguous Memory
|
||
Addressing on the Advantage!)
|
||
|
||
* The AT system board may be equipped with either 256K or 512K
|
||
installed. A jumper on the system board (J18) determines the
|
||
maximum amount of memory the system board will accept. With
|
||
the jumper in one position, the system board will accept a
|
||
maximum of 256K, while in the opposite position, the system
|
||
board will accept a maximum of 512K. IBM ships some 256K ATs
|
||
with this jumper in the 512K position. This means that in
|
||
such a 256K AT, there is an additional "phantom" 256K memory
|
||
block present. When the Advantage! is then installed, its
|
||
memory will conflict with this "phantom" 256K block on the AT
|
||
system board. The usual symptom of this problem is an error
|
||
during power on self test such as "040002...201".
|
||
|
||
* To avoid this memory addressing conflict, before you install
|
||
the Advantage! in a 256K AT, verify that the jumper on the AT
|
||
system board is in the correct 256K position. The jumper is
|
||
identified as "J18" and is located underneath the disk
|
||
controller card at the very front of the AT chassis. It may
|
||
be necessary to lift the disk controller card up in order to
|
||
gain access to the jumper.
|
||
|
||
|
||
|
||
NOTE: As a portion of the data is in pictorial form, it is not
|
||
included here. To obtain a complete copy of this
|
||
technical bulletin, contact:
|
||
|
||
AST RESEARCH, INC.
|
||
2121 Alton Avenue
|
||
Irvine, California 92714
|
||
|
||
ATTENTION: Product Support
|
||
(Technical Bulletin)
|
||
|
||
|
||
TB-0080 PAGE 3
|
||
RUNNING THE AT SETUP PROGRAM
|
||
|
||
* When running the "SETUP" program to tell the AT how much
|
||
memory is installed in the 640K base memory area, the screen
|
||
display indicates that the only valid responses are 256, 512
|
||
or 640. Although not indicated by the display, you may also
|
||
enter 384 if that is appropriate for your machine.
|
||
|
||
* Likewise, when telling the AT how much extended memory you
|
||
have, the screen display indicates that the only valid
|
||
responses are 0, 512, 1024, etc. Although not indicated by
|
||
the display, you may enter any value falling on a 128K
|
||
boundary, e.g. 0, 128, 256, 384, etc., up to 15360 (15
|
||
megabytes).
|
||
|
||
|
||
|
||
TB-0080 PAGE 4
|
||
ADVANTAGE! SWITCH BLOCK #1
|
||
|
||
TABLE A-1: This table is used to tell Advantage! what memory you
|
||
have in each bank.
|
||
|
||
Number of Rows
|
||
Installed on
|
||
Advantage Row 1 Row 2 Row 3 Row 4 Row 5 Row 6 SW1 SW2 SW3 SW4 SW5
|
||
|
||
1 128K OFF OFF OFF OFF ON
|
||
1 512K OFF OFF ON ON ON
|
||
|
||
2 128K 128K OFF OFF OFF ON OFF
|
||
2 128K 512K ON OFF OFF OFF OFF
|
||
2 512K 512K OFF ON OFF OFF OFF
|
||
|
||
3 128K 128K 128K OFF OFF OFF ON ON
|
||
3 128K 128K 512K ON OFF ON OFF ON
|
||
3 128K 512K 512K ON OFF OFF OFF ON
|
||
3 512K 512K 512K OFF ON OFF OFF ON
|
||
|
||
4 128K 128K 128K 128K OFF OFF ON OFF OFF
|
||
4 128K 128K 128K 512K ON ON OFF OFF ON
|
||
4 128K 128K 512K 512K ON OFF ON ON OFF
|
||
4 128K 512K 512K 512K ON OFF OFF ON OFF
|
||
4 512K 512K 512K 512K OFF ON OFF ON OFF
|
||
|
||
5 128K 128K 128K 128K 128K OFF OFF ON OFF ON
|
||
5 128K 128K 128K 128K 512K ON ON ON OFF OFF
|
||
5 128K 128K 128K 512K 512K ON ON OFF ON OFF
|
||
5 128K 128K 512K 512K 512K ON OFF ON ON ON
|
||
5 128K 512K 512K 512K 512K ON OFF OFF ON ON
|
||
5 512K 512K 512K 512K 512K OFF ON OFF ON ON
|
||
|
||
6 128K 128K 128K 128K 128K 128K OFF OFF ON ON OFF
|
||
6 128K 128K 128K 128K 128K 512K ON ON ON ON OFF
|
||
6 128K 128K 128K 128K 512K 512K ON ON ON OFF ON
|
||
6 128K 128K 128K 512K 512K 512K ON ON OFF ON ON
|
||
6 128K 128K 512K 512K 512K 512K ON ON OFF OFF OFF
|
||
6 128K 512K 512K 512K 512K 512K ON OFF ON OFF OFF
|
||
6 512K 512K 512K 512K 512K 512K OFF ON ON OFF OFF
|
||
|
||
|
||
NOTE #1: You must have 128K banks filled before going to 512K banks.
|
||
|
||
NOTE #2: As a portion of the data is in pictorial form, it is not
|
||
included here. To obtain a complete copy of this
|
||
technical bulletin, contact:
|
||
|
||
AST RESEARCH, INC.
|
||
2121 Alton Avenue
|
||
Irvine, California 92714
|
||
|
||
ATTENTION: Product Support
|
||
(Technical Bulletin)
|
||
|
||
|
||
TB-0080 PAGE 5
|
||
ADVANTAGE! SWITCH BLOCK #3
|
||
|
||
Table D-1. Split Memory Addressing Memory Allocation
|
||
_______________________________________________________________________
|
||
Total Number Number Total| 256K AT | 512K AT
|
||
Memory Rows Rows Advtg.| |
|
||
Rows 64K 256K Memory|Base Exp. Total|Base Exp. Total
|
||
Populated Chips Chips (KB)|Mem. Mem. Mem.|Mem. Mem. Mem.
|
||
-----------------------------------------------------------------------
|
||
1 1 0 128 384 0 384 640 0 640
|
||
1 0 1 512 640 128 768 640 384 1024
|
||
-----------------------------------------------------------------------
|
||
2 2 0 256 512 0 512 640 128 768
|
||
2 1 1 640 640 256 896 640 512 1152
|
||
2 0 2 1024 640 640 1280 640 896 1536
|
||
-----------------------------------------------------------------------
|
||
3 3 0 384 640 0 640 640 256 896
|
||
3 2 1 768 640 384 1024 640 640 1280
|
||
3 1 2 1152 640 768 1408 640 1024 1664
|
||
3 0 3 1536 640 1152 1792 640 1408 2048
|
||
-----------------------------------------------------------------------
|
||
4 4 0 512 640 128 768 640 384 1024
|
||
4 3 1 896 640 512 1152 640 768 1408
|
||
4 2 2 1280 640 896 1536 640 1152 1792
|
||
4 1 3 1664 640 1280 1920 640 1536 2176
|
||
4 0 4 2048 640 1664 2304 640 1920 2560
|
||
-----------------------------------------------------------------------
|
||
5 5 0 640 640 256 896 640 512 1152
|
||
5 4 1 896 640 512 1152 640 768 1408
|
||
5 3 2 1408 640 1024 1664 640 1280 1920
|
||
5 2 3 1792 640 1408 2048 640 1664 2304
|
||
5 1 4 2176 640 1792 2432 640 2048 2688
|
||
5 0 5 2560 640 2176 2816 640 2432 3072
|
||
-----------------------------------------------------------------------
|
||
6 6 0 768 640 384 1024 640 640 1280
|
||
6 5 1 1152 640 768 1408 640 1024 1664
|
||
6 4 2 1536 640 1152 1792 640 1408 2048
|
||
6 3 3 1920 640 1536 2176 640 1792 2432
|
||
6 2 4 2304 640 1920 2560 640 2176 2816
|
||
6 1 5 2688 640 2304 2944 640 2560 3200
|
||
6 0 6 3072 640 2688 3328 640 2944 3584
|
||
-----------------------------------------------------------------------
|
||
|
||
Conversion Chart for calculating the amount of base memory and
|
||
expansion memory in the AT when using split memory addressing on
|
||
the Advantage!
|
||
|
||
|
||
Table D-2 Switch Block #3 Settings (Starting Address)
|
||
_______________________________________________________________
|
||
Advantage! Advantage! Advantage!
|
||
Start Start Start Advantage! Switch Block #3
|
||
Address Address Address
|
||
(Megabytes) (K-Bytes) (Hexadecimal) SW1 SW2 SW3 SW4 SW5 SW6 SW7
|
||
---------------------------------------------------------------
|
||
0.250 256 040000 ON ON ON ON ON OFF ON
|
||
0.500 512 080000 ON ON ON ON OFF ON ON
|
||
|
||
1.000 1024 100000 ON ON ON OFF ON ON ON
|
||
1.125 1152 120000 ON ON ON OFF ON ON OFF
|
||
1.250 1280 140000 ON ON ON OFF ON OFF ON
|
||
1.375 1408 160000 ON ON ON OFF ON OFF OFF
|
||
1.500 1536 180000 ON ON ON OFF OFF ON ON
|
||
1.625 1664 1A0000 ON ON ON OFF OFF ON OFF
|
||
1.750 1792 1C0000 ON ON ON OFF OFF OFF ON
|
||
1.875 1920 1E0000 ON ON ON OFF OFF OFF OFF
|
||
2.000 2048 200000 ON ON OFF ON ON ON ON
|
||
2.125 2176 220000 ON ON OFF ON ON ON OFF
|
||
2.250 2304 240000 ON ON OFF ON ON OFF ON
|
||
2.375 2432 260000 ON ON OFF ON ON OFF OFF
|
||
2.500 2560 280000 ON ON OFF ON OFF ON ON
|
||
2.625 2688 2A0000 ON ON OFF ON OFF ON OFF
|
||
2.750 2816 2C0000 ON ON OFF ON OFF OFF ON
|
||
2.875 2944 2E0000 ON ON OFF ON OFF OFF OFF
|
||
3.000 3072 300000 ON ON OFF OFF ON ON ON
|
||
3.125 3200 320000 ON ON OFF OFF ON ON OFF
|
||
3.250 3328 340000 ON ON OFF OFF ON OFF ON
|
||
3.375 3456 360000 ON ON OFF OFF ON OFF OFF
|
||
3.500 3584 380000 ON ON OFF OFF OFF ON ON
|
||
3.625 3712 3A0000 ON ON OFF OFF OFF ON OFF
|
||
3.750 3840 3C0000 ON ON OFF OFF OFF OFF ON
|
||
3.875 3968 3E0000 ON ON OFF OFF OFF OFF OFF
|
||
4.000 4096 400000 ON OFF ON ON ON ON ON
|
||
4.125 4224 420000 ON OFF ON ON ON ON OFF
|
||
4.250 4352 440000 ON OFF ON ON ON OFF ON
|
||
4.375 4480 460000 ON OFF ON ON ON OFF OFF
|
||
4.500 4608 480000 ON OFF ON ON OFF ON ON
|
||
4.625 4736 4A0000 ON OFF ON ON OFF ON OFF
|
||
4.750 4864 4C0000 ON OFF ON ON OFF OFF ON
|
||
4.875 4992 4E0000 ON OFF ON ON OFF OFF OFF
|
||
5.000 5120 500000 ON OFF ON OFF ON ON ON
|
||
5.125 5248 520000 ON OFF ON OFF ON ON OFF
|
||
5.250 5376 540000 ON OFF ON OFF ON OFF ON
|
||
5.375 5504 560000 ON OFF ON OFF ON OFF OFF
|
||
5.500 5632 580000 ON OFF ON OFF OFF ON ON
|
||
5.625 5760 5A0000 ON OFF ON OFF OFF ON OFF
|
||
5.750 5888 5C0000 ON OFF ON OFF OFF OFF ON
|
||
5.875 6016 5E0000 ON OFF ON OFF OFF OFF OFF
|
||
6.000 6144 600000 ON OFF OFF ON ON ON ON
|
||
|
||
|
||
SW1 Used for formation of 128K and 512K banks on
|
||
Advantage! (See Page 4.)
|
||
|
||
SW2 Not used for memory.
|
||
|
||
SW3 Used for starting address. Use Table D-2 only if
|
||
you do not split memory.
|
||
|
||
If split memory is used, Table D-2 is used only to
|
||
give expansion memory amount in Set-Up program.
|
||
|
||
|
||
NOTE: As a portion of the data is in pictorial form, it is not
|
||
included here. To obtain a complete copy of this
|
||
technical bulletin, contact:
|
||
|
||
AST RESEARCH, INC.
|
||
2121 Alton Avenue
|
||
Irvine, California 92714
|
||
|
||
ATTENTION: Product Support
|
||
(Technical Bulletin)
|
||
|
||
|
||
TB-0080 PAGE 8
|
||
PARALLEL PORT
|
||
|
||
IRQ JUMPER BLOCK
|
||
|
||
IRQ7 = LPT 1
|
||
IRQ5 = LPT 2
|
||
If you have no Parallel Ports in the system.
|
||
|
||
IRQ JUMPER BLOCK
|
||
|
||
IRQ5 = LPT 2
|
||
No Interrupt for LPT3
|
||
If you already have one parallel port in the system.
|
||
|
||
NOTE #1: Figure C = No parallel ports installed except on the
|
||
AST Advantage! card.
|
||
|
||
Figure D = Parallel port installed as LPT1.
|
||
|
||
NOTE #2: As a portion of the data is in pictorial form, it is not
|
||
included here. To obtain a complete copy of this
|
||
technical bulletin, contact:
|
||
|
||
AST RESEARCH, INC.
|
||
2121 Alton Avenue
|
||
Irvine, California 92714
|
||
|
||
ATTENTION: Product Support
|
||
(Technical Bulletin)
|
||
|
||
|
||
SERIAL PORT
|
||
|
||
NOTE: As a portion of the data is in pictorial form, it is not
|
||
included here. To obtain a complete copy of this
|
||
technical bulletin, contact:
|
||
|
||
|
||
AST RESEARCH, INC.
|
||
2121 Alton Avenue
|
||
Irvine, California 92714
|
||
|
||
ATTENTION: Product Support
|
||
(Technical Bulletin)
|
||
|