241 lines
15 KiB
Plaintext
241 lines
15 KiB
Plaintext
----------------------------------------------------------------
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| National Semiconductor |
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| 33333 22222 000 33333 22222 |
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| 3 3 2 2 0 0 3 3 2 2 |
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| 3 2 0 0 0 3 2 |
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| 33333 222 0 0 0 33333 222 |
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| 3 2 0 0 0 3 2 |
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| 3 3 2 0 0 3 3 2 |
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| 33333 2222222 000 33333 2222222 |
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| NS32032 MICROPROCESSOR Instruction Set Summary |
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| G |
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| ~ ~ ~ N A |
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| S S S I N I D D V D D D D D D D D |
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| T T T L M N B 3 c 3 2 2 2 2 2 2 2 |
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| 2 1 0 O I T 2 1 c 0 9 8 7 6 5 4 3 |
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| ^ ^ ^ ^ | | | ^ | ^ ^ ^ ^ ^ ^ ^ ^ |
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| | | | | | | | | | | | | | | | | | |
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| | | | | v v | v | v v v v v v v v |
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| ------------------------------------- |
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| |10 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 26| |
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| Reserved ---|9 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 27|<-> AD22 |
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| ST3 <--|8 28|<-> AD21 |
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| ~PFS <--|7 29|<-> AD20 |
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| ~DDIN <--|6 30|<-> AD19 |
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| Reserved ---|5 31|<-> AD18 |
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| Reserved ---|4 32|<-> AD17 |
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| PHI1 -->|3 33|<-> AD16 |
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| PHI2 -->|2 34|<-> AD15 |
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| ~ADS <--|1 NS32032 35|<-> AD14 |
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| U/~S <--|68 36|<-> AD13 |
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| Reserved ---|67 37|<-> AD12 |
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| Reserved ---|66 38|<-> AD11 |
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| ~AT/~SPC <->|65 39|<-> AD10 |
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| ~DS/~FLT <->|64 40|<-> AD9 |
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|~RST/~ABT -->|63 41|<-> AD8 |
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| Reserved ---|62 42|<-> AD7 |
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| Reserved ---|61 5 5 5 5 5 5 5 5 5 5 4 4 4 4 4 43|<-> AD6 |
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| (connect to |60 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 44| |
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| Vcc via 4K7 ------------------------------------- |
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| resistor) | | | | | | ^ ^ | | | ^ ^ ^ ^ ^ ^ |
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| | | | | | | | | | | | | | | | | | |
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| | v v v v v | | | | | v v v v v v |
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| R ~ ~ ~ ~ ~ ~ R G G B A A A A A A |
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| e B B B B H H D N N B D D D D D D |
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| s E E E E L O Y D D G 0 1 2 3 4 5 |
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| e 0 1 2 3 D L B L |
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| r A D 1 |
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| v |
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|Written by Jonathan Bowen |
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| Programming Research Group |
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| Oxford University Computing Laboratory |
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| 8-11 Keble Road |
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| Oxford OX1 3QD |
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| England |
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| Tel +44-865-273840 |
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|Created April 1985 |
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|Updated May 1985 |
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|Issue 1.0 Copyright (C) J.P.Bowen 1985|
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----------------------------------------------------------------
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----------------------------------------------------------------
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|Mnemonic |Description |
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|---------------+----------------------------------------------|
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|ABSi g,g |Take Absolute value |
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|ABSf g,g |Take Absolute floating point value |
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|ACBi s,g,d |Add 4-bit Constant and Branch if non-zero |
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|ADDi g,g |Add |
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|ADDf g,g |Add floating point values |
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|ADDCi g,g |Add with Carry |
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|ADDPi g,g |Add Packed (BCD) |
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|ADDQi s,g |Add Quick a 4-bit constant |
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|ADDR g,g |Move effective Address |
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|ADJSPi g |Adjust Stack Pointer |
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|ANDi g,g |Logical AND |
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|ASHi g,g |Arithmetic Shift, left or right |
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|Bcc d |Branch on condition (cc) |
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|BICi g,g |Bit Clear |
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|BICPSRi g |Bit Clear Processor Status Register (i=W/D #)|
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|BISPSRi g |Bit Set Processor Status Register (i=W/D #)|
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|BPT |Breakpoint Trap |
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|BR d |Branch (PC relative) |
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|BSR d |Branch to Subroutine |
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|CASEi g |Case (multiway branch) |
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|CATSTn g |Custom Address Test (n=0-1) (#)|
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|CBITi g,g |Test and Clear Bit |
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|CBITIi g,g |Test and Clear Bit Interlocked |
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|CCALnc g,g |Custom Calculate (n=0-3) |
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|CCMPc g,g |Custom Compare |
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|CCVnci g,g |Custom Convert custom value to integer (n=0-2)|
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|CCV3ic g,g |Custom Convert integer to custom value |
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|CCV4DQ g,g |Custom Convert double to quad value |
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|CCV5QD g,g |Custom Convert quad to double value |
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|CHECKi r,g,g |Check index bounds |
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|CMPi g,g |Compare |
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|CMPf g,g |Compare floating point values |
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|CMPMi g,g,d |Compare Multiple: displacement bytes |
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|CMPQi s,g |Compare Quick with a 4-bit constant |
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|CMPSi ol |Compare Strings |
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|CMPSTi ol |Compare Strings, Translating bytes |
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|COMi g,g |Complement all bits |
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|CMOVnc g,g |Custom Move (n=0-2) |
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|CVTP r,g,g |Convert to bit field Pointer |
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|CXP d |Call External Procedure |
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|CXPD g |Call External Procedure using Descriptor |
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|DEIi g,g |Divide Extended Integer |
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|DIA |Diagnose (hardware breakpoint) |
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|DIVi g,g |Divide, rounding down |
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|DIVf g,g |Divide floating point values |
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|ENTER (rl),d |Enter procedure (save registers) |
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|EXIT (rl) |Exit procedure (restore registers) |
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|EXTi r,g,g,d|Extract bit field (array orientated) |
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|EXTSi g,g,m,m|Extract Short bit field |
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|FLAG |Flag trap |
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|FLOORfi g,g |Convert f.p. to largest integer <= value |
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|FFSi g,g |Find First Set bit |
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|IBITi g,g |Test and Invert Bit |
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|INDEXi r,g,g |Recursive Indexing step for N-D arrays |
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|INSi r,g,g,d|Insert bit field (array orientated) |
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|INSSi g,g,m,m|Insert Short bit field |
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|JSR g |Jump to Subroutine |
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|JUMP g |Jump |
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|LCR cr,g |Load Custom Register (#)|
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|LCSR g |Load Custom Status Register |
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|LFSR g |Load Floating point Status Register |
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|LMR mr,g |Load Memory management Register (#)|
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|LPRi ar,g |Load dedicated Register (a=PSR/INTBASE #)|
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|LSHi g,g |Logical Shift, left or right |
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|MEIi g,g |Multiply to Extended Integer |
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|MODi g,g |Modulus (remainder from QUO) |
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|MOVi g,g |Move a value |
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|MOVif g,g |Move an integer to a floating point value |
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|MOVf g,g |Move a floating point value |
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|MOVFL g,g |Move and lengthen a floating point value |
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|MOVLF g,g |Move and shorten a Long floating point value |
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|MOVMi g,g,d |Move Multiple: displacement bytes |
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|MOVQi s,g |Move Quick and extend a 4-bit constant |
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|MOVSi ol |Move String |
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|MOVSTi ol |Move String, Translating bytes |
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|MOVSUi g,g |Move value from Supervisor to User space (#)|
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----------------------------------------------------------------
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----------------------------------------------------------------
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|Mnemonic |Description |
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|---------------+----------------------------------------------|
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|MOVUSi g,g |Move value from User to Supervisor space (#)|
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|MOVXiD g,g |Move with sign Extension to Double word |
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|MOVXBW g,g |Move with sign Extension Byte to Word |
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|MOVZiD g,g |Move with Zero extension to Double word |
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|MOVZBW g,g |Move with Zero extension Byte to Word |
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|MULi g,g |Multiply |
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|MULf g,g |Multiply floating point values |
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|NEGi g,g |Negate (2's complement) |
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|NEGf g,g |Negate floating point value |
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|NOP |No Operation |
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|NOTi g,g |Logical NOT (LSB only) |
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|ORi g,g |Logical OR |
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|QUOi g,g |Quotient (divide, rounding towards zero) |
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|RDVAL g |Validate address for Reading (#)|
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|REMi g,g |Remainder from QUO |
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|RESTORE (rl) |Restore general purpose registers |
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|RET d |Return from subroutine |
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|RETI |Return from Interrupt (#)|
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|RETT d |Return from Trap (#)|
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|ROTi g,g |Rotate, left or right |
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|ROUNDfi g,g |Round a floating point value to an integer |
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|RXP d |Return from External Procedure call |
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|Scci g |Save condition code (cc) as a Boolean value |
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|SAVE (rl) |Save general purpose registers |
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|SBITi g,g |Test and Set Bit |
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|SBITIi g,g |Test and Set Bit Interlocked |
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|SCR cr,g |Store Custom Register (#)|
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|SCSR g |Store Custom Status Register |
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|SETCFG (o) |Set Configuration register (#)|
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|SFSR g |Store Floating point Status Register |
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|SKPSi ol |Skip over String |
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|SKPSTi ol |Skip over String, Translating bytes |
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|SMR mr,g |Store Memory management Register (#)|
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|SPRi ar,g |Store dedicated Register (a=PSR/INTBASE #)|
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|SUBi g,g |Subtract |
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|SUBf g,g |Subtract floating point values |
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|SUBCi g,g |Subtract with Carry (borrow) |
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|SUBPi g,g |Subtract Packed (BCD) |
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|SVC |Supervisor Call |
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|TBITi g,g |Test Bit |
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|TRUNCfi g,g |Truncate toward zero floating point to integer|
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|WAIT |Wait for interrupt |
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|WRVAL g |Validate address for Writing (#)|
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|XORi g,g |Logical Exclusive OR |
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|---------------+----------------------------------------------|
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| CFG |Configuration register (4-bit) |
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| EXTERNAL |External link table entry |
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| FP |Frame Pointer register (32-bit, top 8 zero) |
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| INTBASE |Interrupt Base register (32-bit, top 8 zero) |
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| MOD |Module register (16-bit) |
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| PC |Program Counter (32-bit, top 8 zero) |
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| PSR |Processor Status Register (16-bit) |
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| Rn or Fn |General purpose Registers (32-bit, n=0-7) |
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| SB |Static Base register (32-bit, top 8 zero) |
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| SP0 (SP) |Supervisor Stack Pointer (32-bit, top 8 zero) |
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| SP1 (SP) |User Stack Pointer (32-bit, top 8 zero) |
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| TOS |Top Of current Stack |
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| US |User Status (8-bit, bottom byte of PSR) |
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|---------------+----------------------------------------------|
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| ar |Dedicated reg. (SP/SB/FP/MOD/INTBASE/PSR/US) |
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| c |Custom length (D/Q=double/quad word) |
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| cc |(EQ/NE/CS/CC/HI/LS/GT/LE/FS/FC/LO/HS/LT/GE) |
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| cr |Custom slave processor register |
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| d |Displacement constant (8/16/32-bit) |
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| f |Floating point length (F/L=standard/long) |
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| g |General operand |
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| i |Integer length (B/W/D=byte/word/double word) |
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| m |Implied immediate constant (8-bit) |
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| mr |Memory management status/control register |
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| n |Digit |
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| o |Options (B/U/W=backward/until/while) |
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| ol |Option list (C/M/F/I=custom/MMU/FPU/interrupt)|
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| r |General purpose register (R0-R7/F0-F7) |
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| rl |General purpose register list |
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| s |Short signed 4-bit value |
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| # |Privileged instruction |
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----------------------------------------------------------------
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