53 lines
1.9 KiB
Plaintext
53 lines
1.9 KiB
Plaintext
P6 Processor Overview
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Intel's P6 family of processors...
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o Ensures complete binary compatibility with previous generations of the
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Intel Architecture.
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o Delivers superior performance through an innovation called Dynamic
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Execution*.
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o Provides support for enhanced data integrity and reliability feaures:
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ECC (Error Checking and Correction), Fault Analysis & Recovery, and
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Functional Redundancy Checking.
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o Includes features that will greatly simplify the design of multiprocessing
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systems.
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The first member of the P6 processor family...
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o Arrives in desktops and servers in 1995.
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o Integrates about 5.5 million transistors on the chip, compared to
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approximately 3.1 million transistors on the Pentium processor.
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o Will operate at 133 MHz with estimated performance at more than 200
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SPECint92.
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o Will initially be produced on the same high volume 0.6 micron process
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currently used for the 90 and 100 MHz versions of the Pentium processor,
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and will then move to a 0.35 micron process.
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o Delivers performance that will scale up to 1000 MIPS with four processors.
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* What is Dynamic Execution?
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Dynamic Execution is the unique combination of three processing
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techniques the P6 uses to speed up software:
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o Multiple Branch prediction:
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First, the processor looks multiple steps ahead in the software and
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predicts which branches, or groups of instructions, are likely to be
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processed next. This increases the amount of work fed to the processor.
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o Dataflow analysis:
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Next, the P6 analyzes which instructions are dependent on each other's
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results, or data, to create an optimized schedule of instructions.
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o Speculative Execution:
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Instructions are then carried out speculatively based on this optimized
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schedule, keeping all the chip's superscalar processing power busy, and
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boosting overall software performance.
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