448 lines
19 KiB
Plaintext
448 lines
19 KiB
Plaintext
Genlock circuit operation description
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-----------------------------------------------------------
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Enhancements:
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One feature that space does not allow for now is the ability to
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have software control of pixel switch disable. Now this is done with a
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mechanical switch. Pixel switch disable allows the user to completely
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ignore background video, yet have the Amiga computer genlocked. This
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eliminates the problem of software having to be written with genlock
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in mind. It would add $5-$10 to cost of goods. The control bits would
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be encoded in the vertical interval, as audio on/off is presently
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done. Eight to sixteen functions (bits) could be controlled once this
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ability is on the board.
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CHROMA KEY -- since all signals are in RGB format, it would be easy
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to selectively insert video based on color level. Additional circuitry
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would add about $10, but would not fit in the existing case.
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============================================================
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Circuit description
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The purpose of the genlock peripheral is to synchronize the video
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output of the Amiga computer with another video source such as camera,
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broadcast, or VCR. Circuitry inside the peripheral allows for the
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overlay of computer graphics on whatever video source is connected.
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Also provided are facilities for stereo mixing of computer and source
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audio. Input to the genlock peripheral is composite source and analog
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RGB computer video. Output video is in the forms of composite and
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analog RGB for high-resolution viewing on an RGB monitor. Also output
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are a master 28.636363 MHZ computer clock, H/2, and V/2 video resets
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required to synchronize the computer's graphic devices. Power for this
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device is derived from computer +5, +12, -5 volts D.C. rails.
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Circuitry in the peripheral is divided into several main functions
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which are: 1) regenerating the horizontal and vertical components of
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the original composite source video, (2) phase locking the 28 MHZ
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clock to input video horizontal timing, (3) combining source and
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computer video, (4) mixing source and computer audio, (5) and encoding
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the RGB overlayed video into NTSC or PAL.
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(1) REGENERATING HORIZONTAL AND VERTICAL TIMING
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Source composite video enter on J1. Transistors Q16 and Q7 form a
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feedback amplifier with a gain of 3. Simple sync tip clamping is
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provided by CR3, whose clamp voltage is set by CR4. The net effect is
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to clamp sync tips at around 0 volts. Comparator U3 strips the sync
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off of the clamped composite video on it's pin 4. Comparator trip
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point is set by resistive divider R55 and R49 to be at about the 50%
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amplitude point on the sync. On the output of U3 (pin 9) is composite
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sync at TTL levels.
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One-shot U1 is a digital integrator designed to detect when video
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drops out for more than 12 lines. The output of this detector forces
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crystal mode operation (Q4 enables power to the crystal oscillator)
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and selects computer composite sync (J8-19) to insure a stable monitor
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picture. Nand gates in U5 form the sync selector logic.
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The composite sync output of selector U5 is decoded into its
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horizontal and vertical components. The time constants of
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differentiator C21/R56 and one-shot U12 are chosen to trigger only on
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the horizontal components of sync. Output on U12 pin 5 is a series of
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pulses at a horizontal rate. One-shot U19 forms a negative going
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pulse 4.7 microseconds wide buffered by U23 for monitors requiring
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seperate horizontal sync (J10-11). The time constants of integrator R77/R76
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/C34 and one-shot U12 are chosen to trigger only on the vertical
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component of composite sync. The output on U12 pin 4 is a pulse 90
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microseconds wide on line 3 every vertical interval. One-shot U19
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generates a negative pulse 200 microseconds wide buffered U23 for
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monitors requiring seperate vertical sync (J10-10).
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The graphic devices in the Amiga computer require reset every other
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vertical interval in genlock mode. Dual-D flip flop U15 performs this
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task. It is basically wired as a divide by 2 with horizontal sync
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clocking the first stage. This causes the V/2 reset pulse to be
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synchronous with horizontal, one line wide, retiming its edges. V/2
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reset is buffered by R10 because at times the Amiga computer will
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output vertical pulses on J9-23, (ie. genlock mode not selected with
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peripheral attached).
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The sandcastle generator is made up of U2, U7, Q5, and Q6. This
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circuitry generates a multi-level pulse, encoding burst and blanking
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timing information for U8, the chroma decoder. One-shot U2 time
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constants are chosen to generate the blanking portion of the sandcastle
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pulse. One-shot U7 time constants are chosen to generate burst timing.
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Transistor pair Q5 and Q6 form a low impedance wide-band inverting
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summing amplifier. R27 supplies a D.C. offset to give the correct D.C.
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levels at Q6 collector for U8. R26 and R31 sum in the blanking and
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burst signals respectively. The gain of any signal to this amplifier
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is set by the ratio of the input series resistor (R26, R31, R27) to
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feedback resistor R28. The sandcastle pulse at Q6 collector encodes
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blanking information from 0-5V dc and burst timing from 5-10V dc, with
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the pulse looking very much like it's name implies.
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H/2 reset is generated by U14 and U17. The input to one-shot U14 is
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regenerated horizontal from the 28 MHZ phase-locked loop. U14 time
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constant is 33 microseconds, making a square wave at horizontal rate on
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pin 12. Dual D-type flip flop U17 is wired as a gated divide by 2. The
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H/2 reset output (J9-21) is a negative going pulse 32 microseconds wide,
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with the edges retimed to the Amiga computer color clock (J9-6). This
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re-timing to color clock is required to guard against metaphysical
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states in the Amiga graphical devices.
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(2) 28 MHZ PHASE LOCKED LOOP
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The circuitry to generate the 28.636363 MHZ clock is comprised of the
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voltage controlled/crystal oscillators, phase detector, and divider, the
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classic phase-locked loop. The VCO has some unique features.
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The genlock peripheral must generate a stable master clock, allowed to
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vary only a few percent in genlock mode. When there is no video on the
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peripheral input, crystal stability is required for real-time clocks and
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counters. To complicate things the Amiga computer cannot tolerate large
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timing variations when switching in and out of genlock mode, missing a
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clock cycle is catastrophic. Therefore, a circuit was designed so that a
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crystal oscillator can "tickle" the voltage controlled oscillator for
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completely synchronous mode switching.
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Q24 and its associated circuitry is the 28 MHZ Colpitts crystal
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oscillator. Q23 is a buffer to prevent loading of Q24. Power for Q23 and
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Q24 is controlled by Q4, supplying current only when there is no input
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video (xtal mode required).
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Q13 and its associated components form a Colpitts voltage controlled
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oscillator. The frequency is changed by varying the D.C. control voltage
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on CR7, a varactor diode. C60 varies the VCO center frequency. The
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connection made by C63 and R128 allows the crystal oscillator to
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"tickle" the VCO. For an in-depth discussion on oscillators, consult
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"Crystal oscillator Circuits" by Robert J. Matthys.
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Q12 buffers the 28 MHZ clock to the Amiga, (J9-1) setting the correct
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TTL levels with R64 and R65. L2 and C41 filter the 28 MHZ to reduce
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RFI.
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A synchronous divide by 1820 is formed by U6, U10, U13, U16, U4. U16
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is a schottky device because of the frequency involved. Operation of
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this circuit is straightforward. The output of U6 pin 13 is a stream of
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pulses at a horizontal rate. This is called regenerated horizontal and
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is never interrupted, an Amiga requirement. This signal is one input to
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the phase detector.
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The phase detector used is the analog sample and hold type. Basically,
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this detector works by sampling a ramp generated from one comparison
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frequency (feedback) with a sample pulse derived from the other
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(reference). The output D.C. is used to control the VCO.
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The reference input for this phase detector is the horizontal component
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of input video, applied to one-shot U11 pin 1. Delay in U11 is about 1/2
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line, with a potentiometer to fine tune horizontal position, R133. U14
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generates a short sample pulse (275 nanoseconds), level shifted by Q14.
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Q14 collector drives sample gate Q25, with the sample voltage held on C78.
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The feedback input goes to the other section of U11, again adding a 1/2
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line delay. The output of U11 is used to trigger the ramp generator
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formed by Q21 and Q22. Ramp charge time is controlled by C52 and is
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designed to accomodate the large timebase errors present in VCR
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playback. Ramp charge time is critical in PLL design: steeper ramp means
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high gain and less lock range, slower ramp means lower gain but increase
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in tracking range.
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The D.C. operating point for this loop is determined by a voltage
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divider formed by R106, R156, and R157. It is chosen to give maximum
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dynamic range.
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Error signal on C78 is buffered by dual op-amp U20, section 1. Loop time
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constants are determined by the R105, C61, C67, R131 around section 2 of
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U20. The output of this section drives the VCO, closing the control loop.
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(3) COMBINING SOURCE AND COMPUTER VIDEO
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Now that the Amiga computer is synchronous with the source video,
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computer and source video is combined. U8 alone performs the overlay
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function.
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The main function of U8 (TDA3301) is to decode composite video into its
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red, green, and blue components. First, source video is split apart into
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chrominance and luminance. Network L1, C27 and R52 filters out chroma,
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passing luminence only information to U8-37. Network R83, L3, C43, and
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C28 passes only chroma information to U8-1. U8 also internally has a
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3.579545 MHZ PLL. By utilizing luminance, chrominance, sandcastle pulse,
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frame pulse (U28-29) and an internal PLL, video is decoded.
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U8 also has inputs for external analog RGB video. Computer RGB is
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applied to U8 pins 25, 26, and 24 respectively. The signal that
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determines if source on computer video is ultimately output is pixel
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switch (J9-4). This is a software generated control line from the Amiga.
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One section of gate U5 is used to force pixel switch to show only
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computer video when source video is lost.
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Each video output of U8 is D.C. clamped for black level stability. The
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following is a description of just the blue channel. Blue video exits U8
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on pin 14. The level is divided down by resistors R71 and R72 and
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feedback to pin 16 completing the loop. C25 is used to hold the sampled
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clamp value (see Motorola data sheet for full details). The blue video
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is then amplified X2 by transistor feedback pair Q10 and Q11. Gain is
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set by the ratio of R60/R61. R63 gives the characteristic line impedance
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of 75 ohms (J10-5). Operation is similar for the green and red channels.
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Other components around U8 are best understood by consulting the TDA3301
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data sheet.
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A hue control (R134) is provided to allow user color matching of
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computer and source video.
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(4) MIXING SOURCE AND COMPUTER AUDIO
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The left audio channel mixer is described. Source audio (J3) is
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capacitivly coupled by C82 and terminated in an impedance of 47K.
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Electronic switch U22 (CD4066BE) is used to disable source audio via
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computer control. It operates as follows.
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The control to enable/disable source audio is encoded in the vertical
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and horizontal blanking interval of the pixel switch line, software
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setable on the Amiga computer. U18 samples pixel switch during the
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vertical interval, using the frame pulse to latch audio status. The
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latched output (U18 pins 6&5) is used to control transmission gates in
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U22. Data is latched on or about line number 10. No horizontal sampling
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is done.
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Computer audio enter on J5. Passive mixing network R140, 141, 143, 142
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and control R132 combines the two sources. Pot R132 allows user control
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relative levels. Right and left mixing is controlled by the same shaft.
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Feedback pair Q19 and Q20 provide gain (x3) to make up for losses in the
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passive mixer. C83 provides bandlimiting (20KHZ) to reduce noise pick-up
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within the box. Audio and video grounds are kept seperate until the
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connector (J9).
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(5) ENCODING THE RGB VIDEO
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Analog RGB signals are encoded into NTSC or PAL by a single device (U21)
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from Motorola, number MC1377. This IC requires only continuous
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subcarrier and composite sync to output composite video. Subcarrier is
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obtained from the oscillator in U8, coupled by C45. Sync comes from the
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output of selector U5.
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The analog RGB signals (0-1v amp.) from U8 are coupled into pins 3,5
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and 4 of U21. Inside the MC1377 a resistive matrix and multipliers
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transform RGB into an encoded chroma signal, output on pin 13. To reduce
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interference with high frequency luminance information, the chroma is
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bandpass filtered to 1 MHZ by T1, R11, C72, and C70. Chroma re-enters
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the chip on pin 10.
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The luminance signal is derived via an internal matrix from the RGB
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input?? output inverted on pin 6. TD1 delays the luminance information
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by 400 ns making up the time delay caused in the chroma path by the
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bandpass filter. Chroma and luma are summed and clamped inside U21,
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emerging on pin 9 as composite video. Emitter follower Q15 buffers the
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video to J6.
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Color burst is also added to the video inside U21. External components
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R95 and C69 determine burst position. Pin 16 is a stable zener derived
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8.5 volts.
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If you would like to receive your own hard-copy of this spec,
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please leave email in mailbox 'techs'
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IMPORTANT: Please make our job easier by including the word
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'genlock' somewhere in the Subject line!!
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Don't forget to leave your name and address.
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I didn't leave out much, the table of contents, a short discussion
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of possible uses, a diagram that shows the location of each
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connector (to be posted next week) and a drawing the shows the
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genlock box and its mechanical interface.
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Thank you,
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Randy Weiner <<rweiner>> Commodore Technical Support
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The following material is excerpted from the preliminary Genlock
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spec.
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Please excuse any non-obvious typos, it will take me a week
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to uncross my eyes.
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Thank you , Randy Weiner 'rweiner'
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Excerpts from the Amiga Genlock Peripheral Specification
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CONNECTORS
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==================================================
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Female 23-pin "D" type (to computer)
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--------------------------------------------------
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pin 1 : 28.636360 MHZ clock out
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2 : external clock enable out
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3 : red analog video in
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4 : green analog video in
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5 : blue analog video in
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6,7,8,9 : no connection
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10: composite sync in
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11: H/2 reset out
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12: V/2 reset out
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13: ground
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14: pixel switch in
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15: color clock (3.58 MHZ) in
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16,17: ground
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18,19: ground
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20: ground
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21: -5 volts in
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22: +12 volts in
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23: +5 volts in
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Male 23-pin "D" type (to monitor)
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--------------------------------------------------
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pin 1 : no connection
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2 : no connection
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3 : red analog video out
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4 : green analog video out
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5 : blue analog video out
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6,7,8,9 : no connection
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10: composite sync out
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11: horizontal sync out
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12: vertical sync out
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13: ground
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14,15: no connection
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16,17: ground
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18,19: ground
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20: ground
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21,22,23: no connection
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RCA-type jacks (8)
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--------------------------------------------------
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1 : composite source video in
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2 : composite video out
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3 : R-source audio in
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4 : L-source audio in
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5 : R-computer audio in
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6 : L-computer audio in
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7 : R-mixed audio out
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8 : L-mixed audio out
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VIDEO PERFORMANCE
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==================================================
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Bandwith:
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composite -3db luminance at 8 MHZ
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Analog RGB -3db at 8 MHZ
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Chroma I&Q -3db at 0.5 MHZ
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Locking Range:
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Horizontal +/- 2% from 15735 HZ
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Subcarrier +/- 300 HZ from 3.579545 MHZ
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Vertical crash lock
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Horizontal phase +/- 1.5 microseconds
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Subcarrier phase +/- 45 degrees from burst
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Timing:
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Vertical reset output is 3 lines late
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Horizontal reset output is coincident with input
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Clock jitter <10ns, 5ns typ. in genlock,
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crystal stable with no video source
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28 MHZ clock in genlock mode, is phase locked to
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input horizontal timing. Automatic
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switch over to crystal mode occurs in
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10 lines of missing source video. No
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discontinuity in clock cycles occurs.
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AUDIO PERFORMANCE
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==================================================
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Bandwidth:
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-3db at 12 HZ and 500 KHZ, flat with 2db
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Gain:
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0 to -50db dependent on mix control setting
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source audio can be disabled (-50db) by setting a bit in pixel
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switch line during vertical blanking
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INPUT SPECIFICATIONS
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==================================================
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Female 23-pin "D" type (to computer)
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--------------------------------------------------
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pin 3 : analog red -- terminated in 75 ohms, inut level of
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1 volt p-p nominal level.
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4 : analog green -- same as analog red
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5 : analog blue -- same as analog red
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10: composite sync -- TTL level, 10K load, negative going
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14: pixel switch -- TTL level, 1K load, low level enables
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external RGB for overlay. During vertical interval,
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a low level of pixel switch enables external audio,
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high level disables. This level is valid during
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horizontal and vertical blanking.
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15: color clock -- TTL level, 4K load, should be synchronous
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with host computer, freq. of 3.579545 MHZ.
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21: -5 volts, approx. 50ma load.
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22: +12 volts, approx. 250ma load.
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23: +5 volts, approx. 300ma load.
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RCA type jacks
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--------------------------------------------------
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composite video -- 75 ohm load, 1 volt p-p, 0.3 volt sync,
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+/- 6db, will accept block vertical
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R-source audio -- 4000 ohm load, 1 volt rms nominal
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L-source audio -- same as above
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R-computer audio -- same as above
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L-computer audio -- same as above
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OUTPUT SPECIFICATIONS
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==================================================
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Female 23-pin "D" type (to computer)
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--------------------------------------------------
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pin 1 : 28.636360 clock -- semi-sinusoid, able to drive two
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schottky TTL loads
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2 : external clock enable -- low active, direct connect. to gnd.
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11: horizontal reset out -- low active, 'LS244 driver, low for
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32 microseconds at beginning of a horizontal line.
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12: vertical reset out -- low active, 'LS244 driver, occurs
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on line 3, 30 microseconds wide.
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Male 23-pin "D" type (to monitor)
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--------------------------------------------------
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pin 3 : red analog video - 75 ohm impedance, will drive 1 volt p-p
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into 75 ohms load
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4 : green analog video - same as pin 3
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5 : blue analog video - same as pin 3
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10: composite sync -- low active, 'LS244 driver
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11: horizontal sync -- low active, 'LS244 driver,
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4.7 microseconds wide
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12: vertical sync -- low active, 'LS244 driver, 3 horizontal
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lines wide.
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RCA jacks
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--------------------------------------------------
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composite video out - 75 ohm impedance, 1 volt p-p into 75 ohm
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load, 0.3 volts sync.
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R-mixed audio -- 100 ohm impedance, 1 volt RMS into 600 ohms.
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L-mixed audio -- same as above
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