157 lines
8.0 KiB
Plaintext
157 lines
8.0 KiB
Plaintext
Amiga 8meg ram expander (C)1991 Silicon Synapse Electronics
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Designed by John Kamchen Support BBS: (204) 589-1078 Wpg,MB Canada Nov.28
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This project is ShareWare. If you build it, and it works (why wouldn't it?)
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then passing $20 along my way would help pay for future projects as fantastic
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as this one. The address is at the end of this file.
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-----------------------------------------------------------------------------
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With memory prices dropping every day, a fully expanded Amiga looks better all
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the time. If you shop around, you can get a 1meg simm for less than $40. That
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means an 8meg system will set you back $320. Not that bad, considering 3 years
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ago that would have got you only 2 megs. But you need more than just RAM, you
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also need a RAM CARD (duhh). These days, you have a big selection to choose
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from. GVP, IVS, ICD to name a few. Some are simply RAM cards, some have an
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SCSI host as well. My GrandSlam cost $300, a Meta4 about $175, DataFlyer RAM
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about $125. Now you can build your own 8meg expander for less than $10 !
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If you shop around, you can get all the interface and control chips for less
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than $5 ($4.98 to be exact). The parts list shows prices from Active. Adding
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sockets and whatever jacks the price up a few bucks.
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Parts List: Cost
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U1 74ls138 .40
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U2 - U6 74ls157 2.35
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U7 - U8 74ls245 1.28
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U9 74ls14 .35
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U10 74hc08 .31
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U11 74ls32 .29
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Misc:
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Decoupling caps 11 x .1uf
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How it works: RAM ACCESS
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When the CPU accesses the area from $20000 to $9FFFFF, U1 decodes A21-A23 to
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provide 4 possible bank select signals. About 58ns after _AS goes low, _RAS
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will also go low. Depending on what kind of access it is (WORD BYTE READ
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WRITE) one or two _CAS lines will go low either 94ns (READ) or >100ns (WRITE)
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after _AS low. Remember that on the 68000, _UDS/_LDS go low at the same time
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as _AS for a READ, but are delayed for a WRITE. That is why they go thru the 2
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OR gates (U11). This ensures that _CASxx will fall at the right time.
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When _AS goes high at the end of the cycle, _CASxx goes high first, then _RAS.
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REFRSH MODE
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The DRAM memory is being used in _CAS before _RAS refresh mode. This means
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that if _CAS is brought LOW about 20ns before _RAS, the DRAM automaticly
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selects what row to refresh. Only 64k x 4, 256k x 4 and 1meg x 1/4 support
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this feature. Otherwise, there would need to be counters and stuff added,
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maybe 5 more chips. When the CPU accesses CHIP ram ($0 to $1FFFFF), Y0 of U1
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goes LOW. This is the signal that says 'Time to refresh, cuz we ain't gonna be
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needed on this cycle'. All _CASxx lines will come low 72ns after _AS LOW,
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followed by _RAS LOW 100ns after _AS LOW. So the time diff between _CAS and
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_RAS is about 28ns, within the 20ns min parameter. The chip is kept refreshed
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untill the cycle ends.
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CONSTRUCTION:
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This design uses D0-D15, A1-A23, R/W, _AS, _UDS and _LDS. All these signals
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can be found at the expansion port of the 500, or CPU/Zorro slots on a 2000.
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For 500 owners ,this board could also be placed under the 68000 itself,
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saving your expansion port for better things. As long as you provide a good
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power path, there should be no problems. My proto-type board with 2megs used
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around 300ma while running Memory_Doctor, and 169ma just sitting there, no
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programs running. It uses ALOT more than my GrandSlam (90ma) for refreshing,
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but I'm not using custom chips and they are. For a 500 supply, 8megs might be
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more than it can handle, so consider buying a 150-200w switching supply (any
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AT type will do since they cost half as much as a '500 specific' supply).
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SIMM sockets cost ALOT of bucks, so you may want to spend a $1 more and buy
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SIPP ram (with the pins). Those can fit into normal IC sockets (Just to give
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you an idea, 8megs of SIPP sockets cost $21, while 12 20pin sockets cost
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$2.50). The SIPPs will tend to sit in at an angle, so fashion some type of
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brace for them. If you use SIPP ram, the board won't fit inside a 500, but
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low-profile SIMM sockets just might.
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Get the exact same parts that I have in the parts list. Don't sub an HC for an
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LS. All types have been chosen for their propagation times. Best place to get
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the parts is Active Components. They are cheap, and always have good stock. I
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have heard of people being charged upto $2 a chip at some other places (Radio
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Shack, WES). Board layout isn't critical, but use some common sense, try and
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keep data and address lines together, and so forth. Wire wrapping is OK.
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ADDING RAM:
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You can use 1meg by 8 (or 9, some place charge MORE for the 8bit sipp!), or
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256k x 8/9 sipps. To use the 256k, they must have only 2 chips on them (3 if
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it is a 9bit simm). Why? The ones with 8 or 9 chips use 256k x 1 type DRAM
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chips. Those are fine in other ram expanders but not here. They DON'T support
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_CAS before _RAS refresh. The 256k x 4 do, so that's what type you need.
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___________________________ ___________________________
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| || || || || || || || || | |-------- -------- ----|
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| || || || || || || || || | |-------- -------- ----|
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uuuuuuuuuuuuuuuuuuuuuuuuuuu uuuuuuuuuuuuuuuuuuuuuuuuuuu
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These won't work! These WILL work fine.
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AUTO-CONFIG:
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As is, the design will not configure on power up. A program called AutoAddRAM
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is used to patch the expansion into the free memory pool. If you have a hard
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drive, this can be done during the startup-sequence. For floppy users, follow
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the docs for the program. Unlike a PAL'd ram card, this one hard-wires the ram
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address area. The folowing are some examples of how to write the .arr file.
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200000 3ffffe 0 Little /* 2meg, using 1meg simm, in bank 1 & 8
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400000 9ffffe 0 BigBoy /* 6meg, using 1meg simm, bank 2,3,4,5,6 & 7
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200000 27fffe 0 Expansion /* 256k, using 256k simm, bank 1 & 8
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400000 47fffe 0 Expansion /* 256k, bank 2 & 7
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600000 67fffe 0 Expansion /* 256k, bank 3 & 6
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800000 87fffe 0 Expansion /* 256k, bank 4 & 5
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With those last 256k areas, you just added 2megs, although it's broken up into
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4 256k sections in the expansion mapped area. This is a cheaper way to get to
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2megs, since those 256k simms are CHEAP when bought used. I found that APPLE
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service centers seems to always have the right type of simm (I assume
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Apple/Mac machines use _CAS before _RAS as well).
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You can also mix and match memory sizes, 2megs using 1meg simms, and an extra
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768k using 256k simms. This list shows where your memory will show up.
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Bank1/8 Bank2/7 Bank3/6 Bank4/5
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from $200000 $400000 $600000 $800000
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256k $27fffe $27fffe $67fffe $67fffe
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1meg $3ffffe $5ffffe $7ffffe $9ffffe
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I provided an .iff picture of where to place the parts and all. There are
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holes here and there for decoupling caps. There are also 2 files in
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BoardMaster format, which contain the actual artwork. Those can be plotted,
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or HP LaserJet printed using BoardMaster. A good way to mount this board is
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to solder 64 wires into the board, then solder your 68000 to those (Look at
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the AtOnce). Just an idea.
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----------------------------------------------------
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Also from Silicon Synapse Electronics ShareWare Division:
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S.A.P.E.P. (Simple Amiga Parallel Eprom Programmer)
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Incredible software/hardware combo. Program 2764-27128 21v/12.5v eproms thru
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the Pport. Fairly simple project shows just how versitile the Amiga's parallel
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port can be! Includes complete schematics, SAPEP program & C source.
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The Computer Tech Journal
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Issue #1: Audio Sampler Fundamentals (includes demo circuits)
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Issue #2: 8meg Ram for Amiga (ignore this, new one this fall)
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Issue #3: Eprom Programmer (Look for S.A.P.E.P., software/hardware project)
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Issue #4: Proto-Board for the Amiga (a must have for any Amiga hacker!)
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To get all the ShareWare/PD files listed in this file, just send $2 (US or
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CDN) and your return address to:
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John Kamchen
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c/o Silicon Synapse Electronics
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41 Matheson Ave.E
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Winnipeg Manitoba Canada
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R2W-0C1
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Or call Silicon Synapse Electronics BBS (204) 589-1078 12/24 24hrs
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or Fire & Brimstone BBS (204) 255-8824 12/24 24hrs Fido# 1:348:705.0
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J.Kamchen Nov.27 1991 3:30pm
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-eof-
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