202 lines
6.7 KiB
Plaintext
202 lines
6.7 KiB
Plaintext
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Currently the XGA exists only in Microchannel versions.
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All register accesses happen through a block of 16 registers starting
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at a adapter dependant register (called xga in the following).
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The register xga+0Ah works as an indexed register ie. xga+0Ah is the
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index register and xga+0Bh is the data register.
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xga+0: Operating Mode
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bit 0 Set if VGA, clear if dual monitor.
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2 Set if in an extended mode.
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xga+1: Video Memory Aperture Control
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0 disables 64k aperture
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xga+4: Interrupt Enable
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0 disables interrupts.
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xga+5: Interrupt Status
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bit 0 Start of blanking
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writing 0FFh clears interrupts.
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xga+6: Virtual Memory Control
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xga+8: Video Memory Aperture Index.
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bit 0-7 64k bank number.
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xga+9: Memory Access Mode
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set to 2 in 16 color modes, 3 in 256 color modes and
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4 in 65536 color modes.
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xga+Ah index 10h: Horizontal Total low.
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bit 0-7 lower 8 bits of the total number of character clocks
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in a scanline.
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xga+Ah index 11h: Horizontal Total high.
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bit 0-7 upper 8 bits of the total number of character clocks
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in a scanline.
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xga+Ah index 12h: Horizontal Displayed low.
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bit 0-7 lower 8 bits of the number of displayed character clocks
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in a scanline.
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xga+Ah index 13h: Horizontal Displayed high.
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bit 0-7 upper 8 bits of the number of displayed character clocks
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in a scanline.
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xga+Ah index 14h: Horizontal Blanking Start low.
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bit 0-7 lower 8 bits of the count at which blanking starts.
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xga+Ah index 15h: Horizontal Blanking Start high.
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bit 0-7 upper 8 bits of the count at which blanking starts.
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xga+Ah index 16h: Horizontal Blanking End low.
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bit 0-7 lower 8 bits of the count at which blanking ends.
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xga+Ah index 17h: Horizontal Blanking End high.
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bit 0-7 upper 8 bits of the count at which blanking ends.
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xga+Ah index 18h: Horizontal Sync Start low.
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bit 0-7 lower 8 bits of the Horizontal Sync Start.
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xga+Ah index 19h: Horizontal Sync Start high.
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bit 0-7 upper 8 bits of the Horizontal Sync Start.
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xga+Ah index 1Ah: Horizontal Sync End low.
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bit 0-7 lower 8 bits of the Horizontal Sync End.
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xga+Ah index 1Bh: Horizontal Sync End high.
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bit 0-7 upper 8 bits of the Horizontal Sync End.
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xga+Ah index 1Ch: Horizontal Sync Position.
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bit 0-7 lower 8 bits of the Horizontal sync position.
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xga+Ah index 1Eh: Horizontal Sync Position.
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bit 0-7 upper 8 bits of the Horizontal sync position.
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xga+Ah index 20h: Vertical Total low.
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bit 0-7 lower 8 bits of the total number of scanlines.
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xga+Ah index 21h: Vertical Total high.
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bit 0-7 upper 8 bits of the total number of scanlines.
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xga+Ah index 22h: Vertical Displayed End low.
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bit 0-7 lower 8 bits of the number of displayed scanlines.
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xga+Ah index 23h: Vertical Displayed End high.
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bit 0-7 upper 8 bits of the number of displayed scanlines.
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xga+Ah index 24h: Vertical Blanking Start low.
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bit 0-7 lower 8 bits of the Vertical Blanking Start.
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xga+Ah index 25h: Vertical Blanking Start high.
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bit 0-7 upper 8 bits of the Vertical Blanking Start.
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xga+Ah index 26h: Vertical Blanking End low.
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bit 0-7 lower 8 bits of the Vertical Blanking End.
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xga+Ah index 27h: Vertical Blanking End high.
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bit 0-7 upper 8 bits of the Vertical Blanking End.
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xga+Ah index 28h: Vertical Sync Start low.
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bit 0-7 lower 8 bits of the Vertical Sync Start.
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xga+Ah index 29h: Vertical Sync Start high.
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bit 0-7 upper 8 bits of the Vertical Sync Start.
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xga+Ah index 2Ah: Vertical Sync End.
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bit 0-7 .
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xga+Ah index 2Ch: Vertical Line Compare low.
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bit 0-7 lower 8 bits of the Line Compare register.
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xga+Ah index 2Dh: Vertical Line Compare high.
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bit 0-7 upper 8 bits of the Line Compare register.
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xga+Ah index 36h: Sprite Control.
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xga+Ah index 40h: Start Address low.
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bit 0-7 bit 0-7 of the display start address.
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xga+Ah index 41h: Start Address middle.
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bit 0-7 bit 8-15 of the display Start Address.
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xga+Ah index 42h: Start Address high.
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bit 0-7 bit 16-23 of the display Start Address.
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xga+Ah index 43h: Pixel Map Width low.
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bit 0-7 lower 8 bits of the Pixel Map Width.
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xga+Ah index 44h: Pixel Map Width high.
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bit 0-7 upper 8 bits of the Pixel Map Width.
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xga+Ah index 50h: Display Mode 1.
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7=800x600, Fh=1024x768 and C7h=640x480.
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xga+Ah index 51h: Display Mode 2.
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2=16 color mode, 3=256 color mode and 4=64k color mode.
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xga+Ah index 52h: Monitor type.
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bit 2 Clear if capable of 1024x768.
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xga+Ah index 54h: Clock Select.
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0=640x480, 1=800x600, Dh=1024x768 and 4=VGA.
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xga+Ah index 55h: Border Color.
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xga+Ah index 60h: Palette Address Index low.
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bit 0-7 lower 8 bits of the Palette Address Index.
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xga+Ah index 61h: Palette Address Index high.
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bit 0-7 upper 8 bits of the Palette Address Index.
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xga+Ah index 62h: Sprite Pre low.
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bit 0-7 lower 8 bits of the Sprite Pre.
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xga+Ah index 63h: Sprite Pre high.
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bit 0-7 upper 8 bits of the Sprite Pre.
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xga+Ah index 64h: Palette Access.
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0 disables display, FFh enables display.
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xga+Ah index 65h: Palette Data Port.
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bit 0-7 Palette data is read and written to this port.
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Each read or write of the register will increment the
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palette address, first through the Red, Green Blue
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cycle, and then increment the Palette Address Index.
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xga+Ah index 66h: Palette Mode.
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xga+Ah index 70h: External Clock.
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Video Modes:
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640x480 256 colors
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640x480 65536 colors
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800x600 16 colors
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800x600 256 colors
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800x600 65536 colors
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1024x768 16 colors
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1024x768 256 colors
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All modes use a linear address mode, where bits 16-23 of the address
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are in the Video Aperture Index register (xga+8), and the lower 16 bits
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are the offset from 0A000:0.
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In 16 color modes two pixels are stored in each byte. Even pixels are in
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bits 0-3 and odd pixels in bits 4-7.
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Address of pixel = (row *(pixels per row)+coloumn) /2.
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In 256 color modes each pixel occupies a byte. The pixels are addressed
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in linear fashion. Address of pixel = row *(pixels per row) + coloumn.
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In 65536 color modes each pixel occupies two bytes.
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Address of pixel = (row *(pixels per row)+coloumn)*2.
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